BGA pin names

Hello,In the NET+50/20M Hardware Reference, the signals TS*, BR*, BG* and BUSY* is NO CONNECT. In the NET+50 errata - ver. E - it is recommended that BR* and BUSY* is connected to 1K pullup resistors. My question is: Which pins are BR* and BUSY* connected to in the BGA package? Hope someone can answer? Thanks! Tommy

TEA_External generated TEA_ burst cycles cause problems and should not be used. External TA_ terminated single cycles with 8, 16, & 32 bus width can be used. Do not connect to Signal TEA_ except for a 490-510 ohm pull-up resistor. BR_ & BUSY_ External bus master support The NET+50 bus module fails to generate a TS_ following an external bus master cycle, which results in a lockup that requires hardware RESET to restart. External bus master mode is gained by activating BR_. Do not connect to BR_ & BUSY_ except for a 1K pull-up resistor. TS_ TS_ should not be used to determine the beginning of a new cycle or to decode address lines. All external cycles need to be qualified using a NET+50 chip select. Do not connect to TS_ except for 1K pull-up resistor. BR* is T5 and BUSY is P6