# ConnectCore for i.MX6UL MCA ADC channel assignment

**URL:** <https://forums.digi.com/t/connectcore-for-i-mx6ul-mca-adc-channel-assignment/18097>\
**Category:** Linux\
**Tags:** configuration, adc, ccimx6ulsbc, mca, yocto\
**Created:** [March 3, 2017, 10:24am UTC](https://forums.digi.com/t/connectcore-for-i-mx6ul-mca-adc-channel-assignment/18097 "2017-03-03T10:24:55Z")\
**Posts on this page:** 3\
**Page:** 1

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**Author:** ![cgamboni](https://avatars.discourse-cdn.com/v4/letter/c/919ad9/32.png) [@cgamboni](https://forums.digi.com/u/cgamboni)\
**Post date:** [March 3, 2017, 10:24am UTC](https://forums.digi.com/t/connectcore-for-i-mx6ul-mca-adc-channel-assignment/18097/1 "2017-03-03T10:24:55Z")

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I apologize for the silly question if I have overlooked something but I am looking for documentation outlining the MCA\_IO pin number to the cciMX6ULsbc ADC channel number.

I see that in dey 2.0-r5 support was added for the iMX6UL ADC channels. I currently have the Digi ConnectCore 6UL Development Kit which according to the documentation supports five ADC channels on the following Microcontroller Assist (MCA) IO pins: MCA\_IO0, MCA\_IO1, MCA\_IO3, MCA\_IO4, and MCA\_IO5.

I am looking to test the ADCs on my developments kit and I want to know the channel mapping from the MCA\_IO pin to the ADC channel mapping in arch/arm/boot/dts/imx6ul-ccimx6ulsbc-id135.dts. I am assuming it is not 1 to 1 because the default channels are 2,3, and 5 in that file but I could be wrong. Any guidance or documentation would be greatly appreciated.

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**Author:** ![LeonidM](https://avatars.discourse-cdn.com/v4/letter/l/d26b3c/32.png) [@LeonidM](https://forums.digi.com/u/LeonidM)\
**Post date:** [March 3, 2017, 1:15pm UTC](https://forums.digi.com/t/connectcore-for-i-mx6ul-mca-adc-channel-assignment/18097/2 "2017-03-03T13:15:34Z")

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The DTS for R5 can be found here:  
[https://github.com/digi-embedded/linux/blob/v4.1/dey-2.0/maint/arch/arm/boot/dts/imx6ul-ccimx6ulsbc-id135.dts](https://github.com/digi-embedded/linux/blob/v4.1/dey-2.0/maint/arch/arm/boot/dts/imx6ul-ccimx6ulsbc-id135.dts)

looks like ADC is disabled by default, but is this what you are looking for:  
/\*

- Uncomment to enable the i.MX6UL SoC ADCs.
- Include in adc-ch-list the ADC channels (from 0 to 9) that you want to
- enable. Note that the iomux has to be configured accordingly in pinctrl\_adc1
- to configure the pad for ADC operation  
\*/  
//&adc1 {  
// pinctrl-names = “default”;  
// pinctrl-0 = \<&pinctrl\_adc1\>;  
// adc-ch-list = \<2 3 5\>;  
// status = “okay”;  
//};

…

/\* Pin mux configuration _/  
&iomuxc {  
imx6ul-ccimx6ul {  
/_ Uncomment specific pins of the ADC channels enabled in ‘adc-ch-list’ _/  
//pinctrl\_adc1: adc1grp {  
// fsl,pins = \<  
// /_ EXP\_GPIO\_1 -\> GPIO1\_5/ADC1\_IN5 _/  
// MX6UL\_PAD\_GPIO1\_IO05\_\_GPIO1\_IO05 0xb0  
// /_ EXP\_GPIO\_2 -\> GPIO1\_3/ADC1\_IN3 _/  
// MX6UL\_PAD\_GPIO1\_IO03\_\_GPIO1\_IO03 0xb0  
// /_ EXP\_GPIO\_3 -\> GPIO1\_2/ADC1\_IN2 \*/  
// MX6UL\_PAD\_GPIO1\_IO02\_\_GPIO1\_IO02 0xb0  
// \>;  
//};  
};  
};

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<div class="post-metadata">

**Author:** ![cgamboni](https://avatars.discourse-cdn.com/v4/letter/c/919ad9/32.png) [@cgamboni](https://forums.digi.com/u/cgamboni)\
**Post date:** [March 8, 2017, 1:48pm UTC](https://forums.digi.com/t/connectcore-for-i-mx6ul-mca-adc-channel-assignment/18097/3 "2017-03-08T13:48:25Z")

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Thanks for the update I received the answer I was looking for from support:

Via the MCA you provided 5 ADC channels, 2 of which are used internally by the SBC.

MCA\_IO0 - used by SBC  
MCA\_IO1 - accessible via connector J30\_pin7 (GPIO connector)  
MCA\_IO3 - accessible via connector J30\_pin8 (GPIO connector)  
MCA\_IO4 - used by SBC  
MCA\_IO5 - accessible via connector J34\_pin6 (SPI connector)

Enabling these channels in the device tree is done by adding the following to your platform’s .dts file.

# enable ADC channels 1, 3, 5

&mca\_adc {  
digi,adc-ch-lit = \<1 3 5\>;  
digi,adc-vref = \<300000\>;  
};