# FPGA Access on cc9p9215

**URL:** <https://forums.digi.com/t/fpga-access-on-cc9p9215/6178>\
**Category:** Linux\
**Created:** [March 13, 2013, 8:09pm UTC](https://forums.digi.com/t/fpga-access-on-cc9p9215/6178 "2013-03-13T20:09:11Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![digiDave](https://avatars.discourse-cdn.com/v4/letter/d/3d9bf3/32.png) [@digiDave](https://forums.digi.com/u/digiDave)\
**Post date:** [March 13, 2013, 8:09pm UTC](https://forums.digi.com/t/fpga-access-on-cc9p9215/6178/1 "2013-03-13T20:09:11Z")

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Tring to interface an FPGA with cc9p9215 on Dev Board. Does anyone have any sample code using buffered address and data lines to do this? Any pointers would be appreciated - I see a note in the documentation that D0 to D15 are only active when CS0 or CS2 are active?  
Thanks in advance

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<div class="post-metadata">

**Author:** ![digiDave](https://avatars.discourse-cdn.com/v4/letter/d/3d9bf3/32.png) [@digiDave](https://forums.digi.com/u/digiDave)\
**Post date:** [March 22, 2013, 2:53am UTC](https://forums.digi.com/t/fpga-access-on-cc9p9215/6178/2 "2013-03-22T02:53:18Z")

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Resloved. unsigned int \*mptr; int fd, offset, num;  
fd = open(“/dev/mem”, O\_RDWR); //open  
mptr = mmap(0,0x8000,PROT\_READ + PROT\_WRITE, MAP\_SHARED,fd,(0x60000000+offset)); //map  
mptr[0] = 0x00010001 // \<\<