# No wait state on CS4

**URL:** <https://forums.digi.com/t/no-wait-state-on-cs4/4545>\
**Category:** NET+OS\
**Created:** [August 4, 2003, 3:42pm UTC](https://forums.digi.com/t/no-wait-state-on-cs4/4545 "2003-08-04T15:42:10Z")\
**Posts on this page:** 4\
**Page:** 1

<div class="post-metadata">

**Author:** ![gkientz](https://avatars.discourse-cdn.com/v4/letter/g/278dde/32.png) [@gkientz](https://forums.digi.com/u/gkientz)\
**Post date:** [August 4, 2003, 3:42pm UTC](https://forums.digi.com/t/no-wait-state-on-cs4/4545/1 "2003-08-04T15:42:10Z")

</div>

Hello,I configured CS4 as follow : CSAR4 = 0x0d000000; CSOR4 = 0xfe000a00; CSAR4 = 0x0d000001; When I run my software and I watch CS4 on a scope, I can’t see no wait state (CS4 is low 40ns). CS4 is only used to acess registers. Is there something else to do for CS4 initialisation ?? Thank you for your help.

---

<div class="post-metadata">

**Author:** ![waster](https://avatars.discourse-cdn.com/v4/letter/w/90db22/32.png) [@waster](https://forums.digi.com/u/waster)\
**Post date:** [August 4, 2003, 4:43pm UTC](https://forums.digi.com/t/no-wait-state-on-cs4/4545/2 "2003-08-04T16:43:37Z")

</div>

Is your memory configuration correct? You appear to have a 32MB 32-bit wide SRAM device on CS4 with 10 wait states configured but with a base address (0x0D000000) that’s not aligned to a 32MB boundary? Could the 32MB boundary rounding on CS4 be causing two chip selects to overlay? Regards Dave

---

<div class="post-metadata">

**Author:** ![gkientz](https://avatars.discourse-cdn.com/v4/letter/g/278dde/32.png) [@gkientz](https://forums.digi.com/u/gkientz)\
**Post date:** [August 5, 2003, 7:23am UTC](https://forums.digi.com/t/no-wait-state-on-cs4/4545/3 "2003-08-05T07:23:36Z")

</div>

You’re right, 0x0d000000 is not 32M boundary, I tried with the base address 0x0c000000 but it neither works, I have 0 wait state. I tried too with base address at 0x0c000000 and 0xfc000 mask, but the result is the same.

---

<div class="post-metadata">

**Author:** ![muscleman](https://avatars.discourse-cdn.com/v4/letter/m/f1d935/32.png) [@muscleman](https://forums.digi.com/u/muscleman)\
**Post date:** [August 5, 2003, 12:11pm UTC](https://forums.digi.com/t/no-wait-state-on-cs4/4545/4 "2003-08-05T12:11:10Z")

</div>

CS4 should be the same as any of the other CS. The only thing is that on the dev. board I set the CS4\* memory space from 3800000 to 38FFFFF, 2 wait states, no burst, 8-bit data bus and this worked fine.
