Hi,I am trying to write a driver for the NS9750 SPI module and ran into the following problem. The RBC is set whenever I receive a message. I set RBC bit in the status register (why write into a register with only access only??) as instructed in the user guide but the RRDY does not ever seem to get set. Without RRDy getting set, I cannot access the RXFDB data and the FIFO data. I understand that RRDY is never active whenever RBC is active and writing RBC to 1 is required to activate RRDY. Is this wrong?? Can anyone please offer additional insight into this? Thanks, Terence.
FOund the problem. My version of user guide had the WLS (word length select) missing. Need to fill this field to 11 for 8 bits SPI transmission. Terence Soh