# STM32MP157 (stmmac) MDIO bus silent in Linux (works in U-Boot) - SJA1105 + ADIN1300

**URL:** <https://forums.digi.com/t/stm32mp157-stmmac-mdio-bus-silent-in-linux-works-in-u-boot-sja1105-adin1300/38057>\
**Category:** Linux\
**Tags:** ethernet\
**Created:** [December 10, 2025, 8:13pm UTC](https://forums.digi.com/t/stm32mp157-stmmac-mdio-bus-silent-in-linux-works-in-u-boot-sja1105-adin1300/38057 "2025-12-10T20:13:03Z")\
**Posts on this page:** 2\
**Page:** 1

<div class="post-metadata">

**Author:** ![lubos123](https://avatars.discourse-cdn.com/v4/letter/l/a87d85/32.png) [@lubos123](https://forums.digi.com/u/lubos123)\
**Post date:** [December 10, 2025, 8:13pm UTC](https://forums.digi.com/t/stm32mp157-stmmac-mdio-bus-silent-in-linux-works-in-u-boot-sja1105-adin1300/38057/1 "2025-12-10T20:13:03Z")

</div>

Hi everyone,

I am working on a custom board based on **Digi ConnectCore MP157 (STM32MP157)**. I am facing a persistent issue where the **MDIO bus appears completely silent (no clock on MDC and only 3V3 on MDIO)** during Linux boot, resulting in PHY detection failures.

**Hardware Setup:**

- **SoC:** STM32MP157

- **Ethernet MAC:** internal `stmmac` (ETH1), RGMII mode.

- **Switch:** NXP SJA1105Q connected to the CPU port via RGMII (Fixed Link).

- **MDIO Bus:** Managed by the STM32 MAC, shared by 4 PHYs:

**The Problem:** In **U-Boot** , the MDIO bus works correctly. I can use `mdio read 0 0` and I see valid traffic on the oscilloscope (MDC clocking, MDIO data moving). However, once **Linux boots** , the MDC pin remains static (no clock generation), and the kernel fails to detect any PHYs.

**Error Logs (**`dmesg`**):** The SJA1105 driver loads but fails to connect to the PHYs because the MDIO bus read returns nothing (likely reading all zeros).  
`sja1105 spi0.0: Probed switch chip: SJA1105Q`  
`sja1105 spi0.0: configuring for fixed/rgmii link mode`  
`sja1105 spi0.0 lan0 (uninitialized): failed to connect to PHY: -ENODEV`  
`sja1105 spi0.0 lan0 (uninitialized): error -19 setting up PHY for tree 0, switch 0, port 0`

Checking via sysfs shows the devices exist (instantiated by DT), but IDs are invalid:  
`cat /sys/bus/mdio_bus/devices/stmmac-0:00/phy_id`  
`sja1105 spi0.0: Link is Up - 1Gbps/Full - flow control off`

**What I have verified/tried:**

1. **Hardware/Electrical:**

2. **Device Tree Configuration:** I suspect a conflict between the `fixed-link` (for the switch) and the `mdio` node, or an issue with `snps,clk-csr`.

**Current Device Tree Configuration:** I suspect there might be a conflict in the `stmmac` driver when using both a `fixed-link` (for the data path to the switch) and a standard `mdio` node (for PHY management).

**Current Device Tree Snippet:**  
&spi6 {  
pinctrl-names = “default”, “sleep”;  
pinctrl-0 = \<&ccmp15\_spi6\_z\_pins\>;  
pinctrl-1 = \<&ccmp15\_spi6\_z\_sleep\_pins\>;

```
clocks = <&scmi_clk CK_SCMI_SPI6>;
resets = <&scmi_reset RST_SCMI_SPI6>;

cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
status = "okay";

switch@0 {
    compatible = "nxp,sja1105q"; 
    reg = <0>;
    spi-max-frequency = <1000000>; 
    spi-cpha;
    
    reset-gpios = <&gpiob 10 GPIO_ACTIVE_LOW>;

    ports {
        #address-cells = <1>;
        #size-cells = <0>;
        
        port@0 {
            reg = <0>;
            label = "lan0";
            phy-handle = <&phy0>;
            phy-mode = "rgmii";
            sja1105,role-mac;
        };
        port@1 { reg = <1>; label = "lan1"; status = "disabled";};
        port@2 { reg = <2>; label = "lan2"; status = "disabled";};
        port@3 { reg = <3>; label = "lan3"; status = "disabled";};
        
        port@4 {
            reg = <4>;
            label = "cpu";
            ethernet = <&ethernet0>;
            phy-mode = "rgmii";
            rx-internal-delay-ps = <2000>;
            tx-internal-delay-ps = <2000>;
            fixed-link {
                speed = <1000>;
                full-duplex;
            };
        };
    };
};

```

};  
&ethernet0 {  
status = “okay”;  
pinctrl-names = “default”, “sleep”;  
pinctrl-0 = \<&ccmp15\_ethernet0\_pins &mdc\_pins &mdio\_pins\>;  
pinctrl-1 = \<&ccmp15\_ethernet0\_sleep\_pins\>;

```
phy-mode = "rgmii";
st,ext-phyclk;
snps,clk-csr = <0>;

clocks = <&rcc ETHMAC>,
         <&rcc ETHTX>,
         <&rcc ETHRX>,
         <&si5351 0>,
         <&rcc ETHSTP>;
clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx", "eth-ck", "ethstp";

fixed-link {
    speed = <1000>;
    full-duplex;
};

mdio0: mdio {
    compatible = "snps,dwmac-mdio";
    #address-cells = <1>;
    #size-cells = <0>;

    /\* === ADIN1300 PHY @ MDIO 0 === \*/
    phy0: ethernet-phy@0 {
        compatible = "adi,adin1300";
        reg = <0>;

        /\* RESET pin = PA3 \*/
        reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
        reset-assert-us = <10000>;
        reset-deassert-us = <10000>;
        /\* IRQ pin = PF8 \*/
        interrupt-parent = <&gpiof>;
        interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
    };     
};

```

};  
…  
…  
mdc\_pins: mdc-pins {  
pins {  
pinmux = \<STM32\_PINMUX(‘C’, 1, AF11)\>; /\* MDC \*/  
drive-push-pull;  
bias-disable;  
slew-rate = \<2\>;  
};  
};  
mdio\_pins: mdio-pins {  
pins {  
pinmux = \<STM32\_PINMUX(‘A’, 2, AF11)\>; /\* MDIO \*/  
drive-open-drain;  
bias-pull-up;  
slew-rate = \<0\>;  
};  
};

ccmp15\_ethernet0\_sleep\_pins: ethernet0-rgmii-sleep-0 {  
pins1 {  
pinmux = …another ethernet pins…  
\<STM32\_PINMUX(‘G’, 4, ANALOG)\>, /\* GTX\_CLK \*/  
\<STM32\_PINMUX(‘C’, 1, ANALOG)\>, /\* MDC \*/  
\<STM32\_PINMUX(‘A’, 2, ANALOG)\>, /\* MDIO \*/  
\<STM32\_PINMUX(‘C’, 4, ANALOG)\>, /\* RXD0 \*/  
…another ethernet pins…  
};  
};

---

<div class="post-metadata">

**Author:** ![thomas.kuhlmann](https://sea2.discourse-cdn.com/flex016/user_avatar/forums.digi.com/thomas.kuhlmann/32/7_2.png) [@thomas.kuhlmann](https://forums.digi.com/u/thomas.kuhlmann)\
**Post date:** [December 16, 2025, 4:28pm UTC](https://forums.digi.com/t/stm32mp157-stmmac-mdio-bus-silent-in-linux-works-in-u-boot-sja1105-adin1300/38057/2 "2025-12-16T16:28:33Z")

</div>

without having verified the [Digi AI Support Assistant | Digi International](https://www.digi.com/support/ai) response, maybe these AI hints might help? :

Based on your description and the available documentation, here are some key points to consider regarding the MDIO bus issue on the ConnectCore MP157 in RGMII mode:

1. **Pinmux and Device Tree Configuration** : The MDIO (and MDC) lines must be correctly configured in the device tree for the STM32MP157 SoC. If the pinmux is not set up properly, the MAC will not drive the MDIO/MDC lines, resulting in no clock and a static voltage on MDIO. Please verify that your device tree includes the correct pinmux settings for ETH1 MDIO/MDC, similar to:

```auto
eth1_mdio_pins_a: eth1-mdio-0 {
    pins1 {
        pinmux = <STM32_PINMUX('F', 0, AF10)>; /* ETH_MDC */
        bias-disable;
        drive-push-pull;
        slew-rate = <2>;
    };
    pins2 {
        // ...
    };
};

```

1. **Sleep/Idle State** : Ensure that the pins are not left  
in analog or sleep mode during boot. The device tree should not  
configure these pins as ANALOG during normal operation.

2. **PHY Power and Reset** : Confirm that all PHYs and the  
switch are powered up and released from reset before Linux attempts to  
probe them. If they are held in reset or unpowered, MDIO transactions  
will fail.

3. **Fixed Link Configuration** : With a fixed link (such as  
with SJA1105Q), ensure that the MAC is not expecting to manage a PHY  
via MDIO for that port, but only for the actual PHYs present.

4. **Hardware Connections** : Double-check hardware  
connections for MDC/MDIO between STM32MP157 and all PHYs/switch. A  
floating or miswired line can cause the symptoms you describe.

5. **Board-Specific Issues** : There are known issues with Ethernet interface clocking on some Digi ConnectCore boards (see [ETH2 Interface Correction](https://www.digi.com/resources/documentation/digidocs/PDFs/90002551.pdf)), though this is documented for MP13. Similar issues could affect other modules if reference clocks are misrouted.

**Summary:** The most likely cause is incorrect device  
tree pinmux configuration for MDIO/MDC or a hardware issue with the  
connection or power/reset of the PHYs. Review your device tree and  
hardware setup carefully.