Bus capacitance loading for Net50

I am about to do a design using the Net50. I think I may have seen a document detailing a bus loading on address and data example but can’t find it now. Does someone know where to get this document? What is the max pF loading on these buses to meet spec at 44MHz? I briefly looked at the Net50 documentation where they say what the rise/fall delay is for the different drivers, but I could not correlate those descriptions to the actual address/data/control pins. Can anyone help? Examples of drivers are pt33b02, pt33d00.

The enclosed document should answer your questions…

Many thanks for the datasheet. However my Net50 pdf does not specify which pins are what driver type. Can you please post your full datasheet as this obviously has the pin name versus driver type, eg the WE* may be a pt33… type? Thanks

… I think the reason you are having problems is because the original datasheet entitled “Net+works for Net+ARM hardware reference” (part 8833242A) had the driver info in it… The new datasheet, although better presented and with some documentation problems fixed, has a lot of info from the original missing… If a Netsilicon bod doesn’t make this file available within a day or two, let me know and I’ll post a copy to this thread… Regards Dave

I have not received anything from netsilicon. Can you please send me the link to where I can find it. Many Thanks

Hi Andy … um… trying to find the file on the site… no joy… looking at my local copy the size its 4MB bigger than the attach file limit :-(… I’ll think of an alternative method and get back to you… BBFN Dave

Andy send me an email… and assuming you are OK to receive large emails I’ll send it to you that way… BTW it will be a 2.6MB zip file after email attachment encoding that will be about 3.5MB