I need to send and receive synchronous serial data in raw mode. There is no 0x7e header and there is no termination frame or bits. Merely a continuous stream of serial data and a clock with a sync pattern every 270 “words” with a word being 12 bits.
It appears Serial Ports E&F are hardware constrained to only handle asyn or HDLC? I thought this was based on the older Zilog serial processors which indeed did support raw serial modes.
I am using a RCM4310 and I want to avoid using ports A&B due to clock sharing and the programming port with other devices. I need C&D as well and the CLK lines are doubled up with E&F so it is really difficult to change paths.
My processor is preceded with a FPGA so I suppose I could do a sync serial to async converter or sync to HDLC but what a pain.
Surely this processor can support raw serial mode?