some questions!Help

Embedded Devices NET+OS
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The follow are abstracted form the pdf doc >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> At startup, the NET+ARM chip: 1.Resets all internal devices 2.Disables all chip selects except CS0 3.Configures CS0 to map the contents of the ROM to all memory 4.Disables cache At reset, the ARM processor core: 1.Enables ARM mode 2.Sets supervisor mode 3.Disables IRQ and FIRQ interrupts 4.Sets the program counter to 0 The BootLoader’s ROM image: Initializes the memory controller and maps flash to 0xA000000. The PC (program counter) is set accordingly. >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> Questions: 1. Is that mean that the PC jump from 0x0 to 0xA0000.Is it right? 2. At reset all chip slect except CS0 are enabled.When the chip select are enabled such as CS1,CS2,… Is it enabled in the customizeSetupCSX() in cs.c??? 3.How can I read the inner-register(SCR,CSR,MCR etc) of the NS7520 when debuging.I have tryed many ways but failed. In console debug,When I type x 0xFFC00000 ,there are some exception in the netsiliconLibRemote shell window. The same result with the visual GNU-X debugger. 4. In the visual GNU-X debugger ,there are stranges things such as when i click the step button,the current statement sometimes go back!!! Is my setting error or the visual GNU-X debugger have the bugs. 5. Do the ns7520 support cache? If not,why the follow routine has a BSP_CACHE_MASK!!! >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> WORD32 customizeCreateMask(WORD32 size) { /* * THIS CODE MUST BE CUSTOMIZED FOR YOUR BOARD. This implementation * is for NET+OS development boards only. / WORD32 mask; mask = ~size + 1; / compute raw mask*/ mask &= BSP_CACHE_MASK; /* adjust mask to support NET+OS caching*/ return mask; } >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>

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  1. Is that mean that the PC jump from 0x0 to 0xA0000.Is it right? Yes. In reset.s the PC is set to 0x0A000000 from 0x0 2. At reset all chip slect except CS0 are enabled.When the chip select are enabled such as CS1,CS2,… vice versa - when power or reset is applied to the chip the CS0 is the only enabled CS ,and is mapped to the entire memory space (mask 0x000000) s it enabled in the customizeSetupCSX() in cs.c??? CS0 & CS1 are configured in init.s and ncc_init.c files. The remaining CS can be configured in cs.c 3.How can I read the inner-register(SCR,CSR,MCR etc) of the NS7520 when debuging.I have tryed many ways but failed.In console debug,When I type x 0xFFC00000 ,there are some exception in the netsiliconLibRemote shell window.The same result with the visual GNU-X debugger. There must be some connection problem – this should work. Are you connected to the board and ran the script before tring to read the board registers ? 4. In the visual GNU-X debugger ,there are stranges things such as when i click the step button,the current statement sometimes go back!!! Is my setting error or the visual GNU-X debugger have the bugs. This could be due to optimization or bugs in Insight – you can download the newer version of insight for www.ocdemon.com 5. Do the ns7520 support cache? If not,why the follow routine has a BSP_CACHE_MASK!!! There is no cache in NS7520 –the mask is applied to make the BSP consistent with other chips that do have cache. There are no side effects in doing this.