SPI Master Problem

Embedded Devices NET+OS
1

I am trying to check out SPI Master operation on the Connectcore 9P 9215, and have started with the SPI master sample application.

This does not seem to work correctly due to an alignment problem with the Rx buffer. The API help file says the buffer should be aligned on a 4 byte boundary but with the latest patches in the file spi_master.c “SPI_RECV_BUFFER_ALIGN” is #defined as 32. It was 4 in earlier versions.

This causes an Invalid Buffer error in the main application code.

I can define a global buffer with a 32 byte alignment but the application uses dynamically allocated buffers from a ThreadX byte pool. Is there a way to force allignement within a byte pool or should I just generate an oversize buffer and then increase the pointer I send to the SPI routines so that it is correctly aligned?

2

Below is two code examples that shows how to properly setup memory that will be used by API calls such as “NASpiReadWrite”. If you need to setup multiple 32 byte aligned buffers throughout your code, the second approach maybe a little cleaner.

Example 1:
// software reset of the device.
void naRIOReset()
{
// 32 byte align the data
char pool_wb[34]; // 4+ 32
char pool_rb[34]; // 4+ 32
char *wb = pool_wb + 32 - ((long)pool_wb % 32);
char *rb = pool_rb + 32 - ((long)pool_rb % 32);
int length = 2;

            wb[0] = RIO_MCR;
            wb[1] = RIO_FLAG_MCR_RESET;
            memset(rb, 0, length);
            SPIErrors(NASpiReadWrite(RIOSPI.name, wb, rb, 2));

}

Example 2:
//The macro:
// generates the code needed to declare a 32byte aligned buffer
// this buffer does not need to be destroyed because it’s allocated statically.
// --size MUST be a constant. It cannot be a variable.
#define DECLARE_32_BYTE_ALIGN_BUFFER(name, size)
char pool##name[32+size];
char *name = pool##name + 32 - ((long)pool##name % 32);
// #end DECLARE_32_BYTE_ALIGN_BUFFER

// example usage. Creates two buffers. One called wb, one called rb each a length of 2
void naRIOReset()
{
DECLARE_32_BYTE_ALIGN_BUFFER( wb, 2 );
DECLARE_32_BYTE_ALIGN_BUFFER( rb, 2 );
int length = 2;

            wb[0] = RIO_MCR;
            wb[1] = RIO_FLAG_MCR_RESET;
            memset(rb, 0, length);
            SPIErrors(NASpiReadWrite(RIOSPI.name, wb, rb, length));

}

3

Generate an oversized buffer and increase the pointer. This only needs to be done on the read buffer (not the write).

FYI, it needs to be 32byte aligned otherwise you can run into caching issues when using DMA.