Regarding NETA50 DMA Fly-by mode on DMA Ch3, this question relates to whether there is a relationship between two of the fields in the DMA Control Register, BTE and SIZE: If SIZE is set for byte operands, does BTE have to be set for 4-operand transfers (i.e., to get a 32-bit location filled on each transfer)? With SIZE set for byte operands and BTE set for single operand transfers, we have been seeing incoming data only in every fourth byte. Our experiment is not set up at the moment, so we can not test this for ourselves.
>With SIZE set for byte operands and BTE set for > single operand transfers, we have been seeing > incoming data only in every fourth byte. My understanding is you can’t do width translations in fly-by mode without routing hardware on the data bus to place your peripheral byte on the right part of the memory data bus. You will have to live with getting one byte in each 32bit word of memory or use memory-memory mode if your hardware can support it.
There turns out to be an unpublished erratum indicating that the SIZE field does not work for Fly-by, yet another of many occasions when we have been told of an erratum after we have suffered from its effects.
Thanks, stranger.
There is a knowledgebase article about this issue. Search it for DMA.
The size field do not produce expected results when the DMA channel is transmitting data. Bottom line is that in Fly-by Mode, the Size field doesn’t work. The only field that works correctly is when Size set to 00 (32-bit mode). Anyone cannot use the Fly-by write mode for anything less than 32-bit transfers.