PE0 programing as TCLKF

Rabbit Rabbit Software
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1

Hi;

We would need to program the PE0 as TCLKF input.

How would it do?

BR

2

What product are you using?

3

We are using the RCM5700

4

Hi;

We have tested the same functionality with PC4 as TCLKE input and it works.

Follow secuences are the register programing that we have done for both clocks.

PC4/TCLKE

1.- Bit 4 PCDDR = 0 (Input)
2.- Bit 4 PCDCR = 0 (I think that it is not necesary because is an input.)
3.- Bit 0:1 PCAHR =00 (I think that it is not necesary because is an input.)
4.- Bit 4 PCFR = 1 (bit 4 parallel port C as Alternate function)
5.- Later on when I open the HDLC port we have used the function HDLCextClockE(1) included on HDLC_PACKET.LIB

This configuration it works propertly

PE0/TCLKF

1.- Bit 0 PEDDR = 0 (Input)
2.- Bit 0 PEDCR = 0 (I think that it is not necesary because is an input.)
3.- Bit 0:1 PEALR =00 ((I think that it is not necesary because is an input)
4.- Bit 4 PEFR = 1 (bit 0 parallel port E as Alternate function)
5.- Later on when I open the HDLC port we have used the function HDLCextClockF(1) included on HDLC_PACKET.LIB

This configuration it does not work.

BR

5

Have you set the HDLC_F_USEPORT macro to E to tell the HDLC library which port to use for serial port F?

Regards,
Peter

6

Hi;

Right now we are not using #define HDLC_F_USEPORT.

I think that the macro, would must be used when we want to use the port E as F, is not it?

Really I can understand very well what do this macro.

Our design we would want to use both sync ports E & F.

The port E & F pinouts for our hardware design are as follow:

Port E:

-TXE: PE6
-TCLKE: PC4
-RCLKE: PE5
-RXE: PE7

Port F:

-TXF:PE2
-TCLKF: PE0
-RCLKF: PE1
-RXF: PE3

br

7

There is a HDLC_E_USEPORT and a HDLC_F_USEPORT macro. Both of them should be defined to indicate which parallel port each of the serial ports is using. They both default to D if not set by the user.

These are used to enable the init functions program the correct port pin configurations.

Regards,
Peter

8

I have tested the macros

#define HDLC_F_USEPORT E
#define HDLC_E_USEPORT C

but the port PE0/TCLKF still is not working as an input clock.

If we see the signal with oscilloscope, the clock is above 3.3V, however with PC4/TCLKE does not happen it is on 0V

Exactly ports configuration is as follow

WrPortI(PCDDR,&PCDDRShadow,0x41);
WrPortI(PEDDR,&PEDDRShadow,0xFE);
// Parallel port C, D and E output type configuration (0-Driven high/low 1-Open drain)
WrPortI(PCDCR,&PCDCRShadow,0x00);
WrPortI(PEDCR,&PEDCRShadow,0x00);

// Parallel port C, D and E alternate options output pins configuration
WrPortI(PCALR,&PCALRShadow,0x00);
WrPortI(PCAHR,&PCAHRShadow,0x00);
WrPortI(PEALR,&PEALRShadow,0xFC);
WrPortI(PEAHR,&PEAHRShadow,0xFF);

// Parallel port C, D and E alternate options input pins configuration

// Parallel port C, D and E type configuration (0-I/O 1-Alternate function)
WrPortI(PCFR,&PCFRShadow,0xFA);
WrPortI(PEFR,&PEFRShadow,0xFF);

Later on we used

HDLCopenE
HDLCopenF

and

HDLCextClockE(1);
HDLCextClockF(1);

Is it not necessary to configure other registers?

BR