SPI Port D Troubles

Rabbit
1

Hi All,

I am hoping someone can help me to figure out why I can not seem to get a SCLK signal out of my RCM6710 on TXD. I am sure it is something stupid I am doing as I have had no problems in the past using TXB

I am using PD0 as TXD. PC0 as MOSI & PC1 as MISO and am letting the SPI.LIB do the heavy lifting. I can see the data when using thew SPIWrite function but I do not see the clock on PD0.

It must be that I am not telling the Rabbit to put the SCLK out on pin PD0!

Here is my code:

#class auto
/************* SPI Setup ***********************************************/
#define SPI_MASTER
#define SPI_SER_D
#define SPI_CLK_DIVISOR 50
#define CLOCK_PORT D
#define SPI_RX_PORT SPI_RX_PC
#define CLOCK_BIT 0
#define SPI_CLOCK_MODE 0
#define SPI_DEBUG

#use “spi.lib”

#define ADC_CS_T BitWrPortI(PEDR, &PEDRShadow, 0, 7)
#define ADC_CS_F BitWrPortI(PEDR, &PEDRShadow, 1, 7)

#memmap xmem
#use rcm67xx.lib

void main()
{
    int Result;
    unsigned short Data;

    brdInit();

    WrPortI(SPCR,NULL,0x80);               // set A as an input

    WrPortI(PBDDR, &PBDDRShadow, 0xfd);    // 0,2,3,4,5,6,7 outputs.
    WrPortI(PBDR, &PBDRShadow, 0x80);      // set all to zero except PB7  (be carefull PB0 is for flash)

    BitWrPortI(PCFR,&PCFRShadow,1,0);		// Needed SPI_SER_D sets Bit 0 (TXD) to alternate function
    WrPortI(PCDDR, &PCDDRShadow, 0x55);   	//(inputs= PC1 PC3,PC5,PC7. Outputs=PC0,PC2,PC4,PC6
    WrPortI(PCDR, &PCDRShadow, 0x00);
    WrPortI(PDDDR, &PDDDRShadow, 0xfd);    // All outputs except PD1
    WrPortI (PEDDR, &PEDDRShadow, 0xff);   // set E as output
    WrPortI (PEDCR, &PEDCRShadow, 0x00);   //Normal output
    WrPortI (PEFR, &PEFRShadow, 0x00);
    WrPortI(PEDR, &PEDRShadow, 0x80);      // be careful with PE4 it not assignable on rcm6700

    SPIinit();

    Data= 0x7f7f;

    ADC_CS_T;
    Result = SPIWrite(&Data,2);
    ADC_CS_F;

    printf(“Result = %x\\n”,Result);

}  //End of main

Thanks in advance

Terry

1 Like
2

Looking through SPI.LIB, it looks like it doesn’t initialize registers to configure PD0 as the serial D clock.

Try adding these calls (hopefully I have them correct). You’d typically have this incorporated into your existing brdInit() function. Or, after re-reading your original message, you might just need to add the PDFR initialization below to your existing register setup code.

BitWrPortI(PDDDR, &PDDDRShadow, 1, 0);   // configure PD0 as an output
BitWrPortI(PDFR, &PDFRShadow, 1, 0);     // configure PD0 as alternate output
BitWrPortI(PDALR, &PDALRShadow, 0, 0);   // configure PD0 alternate function 0
BitWrPortI(PDALR, &PDALRShadow, 0, 1);   // ...(by setting bottom bits of PDALR)

I think those registers will be enough to configure PD0 as the SCLKD. PDDCR bit 0 should already default to 0 (push/pull instead of open drain), and you probably don’t need to set PDALR since those bits should also default to 0.

I relied on this Rabbit 6000 reference poster to identify the registers to set to configure PD0 as SCLKD.

3

Hi Tom,

Thanks for getting back to me.

The problem was indeed that I had not configure the alternate function for PD) (TXD). I added the following line and it took care of it.

WrPortI (PDFR, &PDFRShadow, 0x01); // Set bit 0 on port D for alternate function (TXD)

Regards

Terry