I can’t acknowledge the UART’s RX-overrun condition. The RXORUN bit in the status register remains 1 even if I acknowledge it by writing a 1 to it. RXRDY and RBC bits are zero, this means no data is available from the FIFO. Also the RX data line is high (3.3V) so there is no data coming in. Can anyone explain me this situation (FIFO full but no RXRDY)? How can I get out of this trap (I keep hangin in the interrupt routine once an ORUN happened…) Thanks, Stefan PS: As far as I know there ARE bugs in the Net+50’s UART but I’ve never heard about a buggy overrun bit. The value of SRA: 00000000 00000000 00010101 00001101