We are looking into using the ME 9210 in one of our products and we are trying to determine if the transfere rate will be fast enough for us. We currently have an 8 bit bus and it would be nice to connect to the ME9210 and trasfere a 500Kbyte file in about 200 milliseconds or less. Do you think it is possible to bitbang the GPIO to do this 8bit parallel data transfere with any sort of speed? Easy to implement?
That equates to about 20Mbit/sec.
On the ME (which runs slightly slower) we were achieving around 200kbit/sec
200kbits/sec?? The ME 9210 spec says 16.7Mbps master SPI and 7.5Mbps slave and that is a serial transfer. So I thought one could improve on that by bitbanging the GPIO into a parallel interface. With a 75MHz processor, 20Mbits/sec is only one parallel byte transfer every 30 clock cycles, seems do-able to me. Am I missing something?
Are we on the same page here? We are talking about the ME 9210 aren’t we? The spec sheet says that it has 10 GPIO, so could you not use 8 for data and two for clocking? I haven’t had a chance to look at the code but it would seem to me that if there was a command that could synchronously toggle the GPIO pins (i.e. void writeGPIO(int data)) then it might be possible to achieve a high rate of parallel transfer. Also you didn’t respond on my comment that the spec sheet states it can do Mbit transfers on the SPI anyways.
Bitbanging the GPIO in assembly would be a good option. Is it easy to program the 9210 module in assembly? Does the ARM926EJ-S compiler allow for C and assembly mixed code? Are there schematics available for the 9210 module?
Thanks for confirming that the NET+OS supports inline assembly, and I do see now that the plug and play dev kit that we bought is mostly useless. Oops.
My current hardware has a parallel 8 bit bus on it and it would be great to interface the 9210 to that bus. I looked at the ConnectCore 9P 9215 but it is too physically large for our application.
The ARM926EJ-S processor is well documented and it might be possible to bit bang the GPIO pins in assembly and achieve a relatively high rate of parallel data transfer. I wonder if one could assume that the GPIO pin numbers (0,1,2,3,5,6,7,9,12,13) are directly mapped to the equivalent GPIO pin numbers on the ARM926EJ-S. That would be great because the lower byte is only missing one bit and would greatly help with the efficiency of the assembly code.
The term ‘bitbanged’ implies that you’re generating all the clock and data signals using code - which is always much slower than using hardware support.
You might be able to do a bit better than my 200kbits/sec by, for example, outputting 4 bits at a time - but you’re limited on I/O on the ME.
Your best bet is probably to deserialise the SPI data stream using external hardware support, if you want a parallel bus. You’ll almost certainly have to use DMA to get the data rate, and I’m not sure whether the SPI driver supports that as standard.
The GPIO on the ME 9210 aren’t contiguous, so you’d have to do some code manipulation to get the data in the right places to come out on the pins - will obviously slow things up.
I did comment on use of the SPI (which I think is your best bet to get close to your desired data rate, but I’ve never used it myself).
Assuming you use one of the standard development platforms, there’s going to be quite a lot of background processing going on - if you bit-bang in code you’d either have to temporarily suspend this (and I don’t think you can suspend it all), or accept some non-uniformity in your data output stream. And you may well have to hand-code key bits in assembler to optimise them
The ME9210 I/O ports are connected to processor port pins, much as you suggest - see the table on page 40 of the hardware manual (90000897_F.pdf - downloadable from ME documentation). And you can directly set/reset them from code. Bear in mind that the apparently unused port bits have internal functions, so their state will probably have to be maintained.
A word of warning - all the I/O pins are ‘slugged’ with capacitors, so you’ll need to sharpen up the edge of any signal used as a clock.