bus bandwidth of ARM+NET processor

hai,My project is to map 8E1’s to 8 ethernet ports. So my problem is, if i use any of NET+ARM processor, can bus bandwidth of processor support 8 E1’s lines as 8 E1’s need around 16 Mbps bandwidth. will the internal memory sufficient for handling the frames or should we go for external memory? can E1 slot switching be done? Can DMA support external access also? We prefer using QFP or PLCC. Note: please mail reply to hariece@yahoo.co.in thanks, hari krishna