Cache and Cache Init

Hi, The new documentation of the Net+50 does not contain any more the Bits Cache-Enable and CINIT in the System-Control-Register of the GEN Module (Bits 7 and 9). What happend to these bits ? How can I initialize and use the Cache ? Jochen

50 chip has cache! It is only 20M and NS7520 that don’t have cache. Are you sure?

Yes, look at NET50_20_HRG_8833450A.pdf, September 2002, page 63 in the NET+50 User Guides on the NetSilicon site.

I see! It looks like a documentation misguide such that I believe the intent in removing the CINIT bit was for 20M since it doesn’t have cache yet this appeared to misguide the users for the 50 chip since it has cache!. You should be able to use the CINIT bit to enable and disable cache usage. We apologize for the inconvenience.