FIM low latency SPI port NetOs 7.5 - Change GPIO pin sequence

Embedded Devices NET+OS
1

Hello,

the new FIM low latency SPI port of NetOS7.5 works great using the preconfigured GPIO pins of the Connectore 9P 9215.

The preset values are:
GPIO 0 - MISO
GPIO 1 - CLK
GPIO 2 - MOSI

I can route these SPI signals to another group of GPIO pins(eg. to GPIO 68, 69, 70), too, by modifying gpio.h and changing BSP_GPIO_MUX_IOP_0_GEN_IO_X to the alternative paths.

But I’d like to exchange GPIO 0 and GPIO 1, so that the CLK is available at GPIO 0.
I know that it is possible to exchange the FIM GPIO ports e.g. for FIM - UART by modifying bsp_io.h but I didn’t find any possibility to do that for FIM - SPI.

Does anyone know how to do that or is it impossible to change the sequence of FIM SPI GPIO - pins ?

Thanks for any hint,
Thomas