The reset pin circuit is documented as different to all other pins (Open collector with pull-up). But it doesn’t give any indication of the other characteristics of that input.
Specifically, is it safe for the pin to be protected from software faults using a small capacitor in series with a digital output?
The implication is that the reset pin will transient above the 3.3V Vcc during the transition (Vout + Cv) where Cv is the voltage the capacitor will charge to between the XBee pull-up and the (~0V) application processor output.
Devices will sometimes be intentionally designed for such a transition (E.g. Atmel328 allows more than double the Vcc on the reset pin), and the open collector design on the XBee certainly suggests it might be too. But the electrical characteristics documentation appears to be missing these vital details…