Hello!Our old designs always used the maximum directly supported SDRAM of 16MByte but we need more than that. 64MByte of SDRAM would be useful. >muscleman said: >It is my understanding that the internal NETA50 SDRAM >controller only supports SDRAM with 8 >CAS lines. SDRAMs with 9 & 10 CAS lines can be supported >by adding external address muxes >and some glue to re-create the A10/AP function. >Using this external MUX memories larger than >16MB can be attached to a single chip select. This is >because the NETA50 has removed the 16M >per chip select limit. My question: Has anyone ever built such a design and can help me so that I don’t have to start from the beginning? Is there a reference design for such a circuit and for the right SDRAM controller settings? I want to use the Micron MT48LC16M16A2TG-75IT chips. Ciao Peter