16M per Chip Select.

NET+ARM 50 can not support more than 16Mbytes DRAM per chip select. Is it also true for any other kind of memory (SRAM, FLASH, etc) not using the DRAM controller?

It is my understanding that the internal NETA50 SDRAM controller only supports SDRAM with 8 CAS lines. SDRAMs with 9 & 10 CAS lines can be supported by adding external address muxes and some glue to re-create the A10/AP function.Using this external MUX memories larger than 16MB can be attached to a single chip select. This is because the NETA50 has removed the 16M per chip select limit.