We set pull down resistors at A[2…3] PLLTST, BISTEN, SCANEN are pulled high We using 18.432MHZ Crystal (We can see 18.432 clk waveform on the crystal) On general register, GEN SYSTEM REGISTER (ADR: FFB00000), we set BCLK output enble to “0” The rest registers are set to default. We are using the part with a part number: NS7520-B-1-C36. Upon power up, we see no BCLK (Pin A6). It does not toggle at all. What do we have to do to check and debug this issue?
No - your configuration is not correct - see erratum and datasheet on NS site with PLLTST, BISEN, and SCANEN all high - you are bypassing the PLL SCANEN MUST have an inverter to it from RESET source