Please Help. SDRAM Burstterminate not working?

We recently did a board spin on an old design and changed our DRAM configuration to SDRAM instead of EDO. We are using NETOS5.0 with GNUtools and the Net+50-3 CPU. Because the portC6 pin was allready being used for something else I decided to use PortD2 (pin 202). My MICMODE on reset pulls A20,21,22 low to enable GPIO Mode. I changed my OCD setup script to set portD2 low by adding the following two lines memwrite long 0xffa00040 0x00040000 memwrite long 0xffa00044 0x00040000 When I execute this script the burstterminate gpio signal goes low as it should. I also modified init.s and ncc_init.c in the places where they were setting portc6 low so now they set portD2 low. below is the code i added. # Now setup portD/2 as a low output portD1 = 0xffa00040 portD2 = 0xffa00044 portD_temp = 0x00040000 # Load portD1 address into R0 LDR R0, =portD1 # Load portd_temp Value into R2 LDR R1, =portD_temp # Store the value in R1 to the PortD1 Register STR R1, [R0] # Load portD2 address into R0 LDR R0, =portD2 # Load portd_temp Value into R2 LDR R1, =portD_temp # Store the value in R1 to the PortD2 Register STR R1, [R0] /*******Code added to NCC_INIT ***************/ *((unsigned long *)0xffa00040) = 0x00040000; *((unsigned long *)0xffa00044) = 0x00040000; After all this I rebuilt the BSP and then built the sample application naftpapp. Then I connect to my hardware via jtag and try to start debugging, but my code never reaches my breakpint in ncc_init.c. I checked the burstterminate signal on portD/2 and it is high? I thought i made all the neccesary changes to make it go low? What am i missing. Is there somewhere else i need to set the burstterminate singal low? Is my code wrong. Please help Thanks Blake

Hello Blake, did you add the hardware fix for the SDRAM burst terminate ? In the manual, you can find the burst terminate solution. " If the NET+ARM experiences a reset after a read command and before a burst terminate command, SDRAM components continue to drive the data bus. This prevents the NET+ARM from being able to reboot from CS0*". Kind regards Alex

Well I figured it out. You have to use a gpio pin on either port A,B,or C. Port D will not work because it is reset on a software reset. Ports A,B and C are not reset on a software reset. The init.s code does a software reset right before it executes the code to drive C6 low. since i was using D2 this reset caused D2 to go high causing the burstterminate signal to go high and basicly disabling SDRAM so then the system would crash. Thanks All

Alex,Thanks for your reply. Yes I do have the SDRAM fix circuity on the board. I used option 2, the 7 gate solution. The only difference between what I have and what is on the devboards is that I uses PortD2 instead of PortC6 for the burstterminate GPIO signal. I made chages to ncc_init.c and init.s in the bsp to have that gpio pin go low. you can see the changes i made in my first post. Any other ideas? Thanks Blake